Concept of Instruction Pipelining in 8086
The pipelining overlaps the phases of instructions as shown in the figure.
As shown in fig., initially the first instruction is fetched from memory then it's decoded.
While first Pipelining instruction is in the decoding phase, the second instruction is
fetched from memory.
When first instruction enters into execution, second is in the decoding phase and third instruction can be fetched from memory.
It improves
performance greatly by maintaining multiple instructions in different phases of
execution.
The improvement in performance by pipelining is clear through the
example of how a sequence of four instructions is executed in a sequential manner and in a pipelined manner as shown in fig. respectively.
In the case of
sequential execution, first instruction pipelining is executed in three clock
cycles assuming that each of the phases is done in one clock cycle.
The second
instruction begins only after first is completed i.e. in the fourth clock cycle. The
total no. of clock cycles needed is 12 as shown in the figure.
The Instruction pipelined execution needs only 6 clock cycles as
shown in the figure. The
first instruction completes in three clock cycles, but thereafter in every
clock cycle, the next instruction completes which is shown as arrows.
In sequential
execution arrows are indicating that
each three clock cycles, one instruction
completes.
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FAQ Schema Check List
1. What is
Instruction Pipelining?
Answer: When first instruction enters into execution, second is in the decoding phase and third instruction can be fetched from memory.
2. Instruction
Pipelining Concepts
Answer:
You go inside to see this site.
3. What
are the diagrams of the concept of instruction pipeline?
Answer:
Diagram 3 of The instruction Pipeline. From the 3 diagrams given, we can
understand. You go inside to see this site.
4. What
is Instruction Pipelining in 8086 Microprocessor Computer?
Answer: When first instruction enters into execution, second is in the decoding phase and third instruction can be fetched from memory.
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