Architecture of the 8085 Microprocessor:

 The internal architecture of the 8085 microprocessor is shown in figure. The 8-bit data enters into the microprocessor through the multiplexed address/data bus AD7-AD0. The 8-bit internal bus connects the accumulator, temporary register, flags, instruction register, interrupt control unit, serial I/O unit, general purpose registers, stack pointer, program counter and data/address buffer. The ALU is fed from the accumulator and temporary registers. Lets us see each component intimately .

Registers :

The Architecture of 8085 Microprocessor

The 8085 contains both 8-bit and 16-bit registers which are discussed below :

     1.     Accumulator (ACC) :
2.     General-purpose registers :
3.     Program Counter (PC) :
4.     Stack Pointer (SP) :
5.     Flag register :
6.     Arithmetic and Logic Unit :
7.     Instruction Register and Decoder :
8.     Interrupt section :
9.     Serial Control Section :
10.   Timing and Control Section :

Microprocessor Vectored Interrupts and Microprocessor 8086 Architecture

CONCEPT OF INSTRUCTION PIPELINING

1.     Accumulator (ACC) :

It is an 8-bit register and focus of all the arithmetic, logic, load and store and I/O instructions in Accumulator.

2. General-purpose registers :

There are six 8-bit general purpose registers B, C, D, E, H and L. they will even be used as 16-bit register pairs as BC, DE and HL. The HL pair is employed for storing 16-bit memory address, while BC and DE are normally wont to store data except in few instructions.

3. Program Counter (PC) :

The program counter may be a 16-bit register which stores address of subsequent instruction to be executed. it's liable for sequencing the program execution.

4. Stack Pointer (SP) :

It is a 16-bit register which stores the address of top of stack. Stack may be a LIFO (Last In First Out) RAM to store data temporarily during the execution of the program.

5. Flag register :

It is an 8-bit register which contains five 1-bit flags employed by conditional jump and call instructions. it's shown in figure.

PSW of 8085

The flags are set or reset consistent with the results of execution of last arithmetic or logical instruction. The flag register is additionally referred to as PSW (Program Status Word) or F-register.

There are five flags as follows:

The carry flag (CY) is an overflow from the 8-bit addition. It acts as “borrow” flag during subtraction.

The parity flag (P) indicates no. of 1’s within the results of arithmetic or logical instructions which is usually stored in accumulator. If no. of 1’s are even within the accumulator, then it's called even parity and parity flag is about to 1. On the opposite hand if no. of 1’s within the accumulator are odd. Then it's called odd parity and parity flag is reset to 0.

The auxiliary carry flag (AC) indicates an overflow from the bit-3 of the result as like CY which is overflow from bit-7. The auxiliary carry flag is usually utilized in BCD (Binary Coded Decimal) operations.

The zero flag (Z) is about to 1 when results of arithmetic or logical instruction is zero. it's cleared when result's not zero.

The MSB (Most Significant Bit) of the accumulator after the arithmetic or logic operation is copied into the sign (S) flag. The 1 within the sign flag indicates result's negative and 0 within the sign flag indicates result's positive.

For example, 8085 performs the subsequent addition and stores the result into accumulator.

6.     Arithmetic and Logic Unit :

It is a logic circuit which is liable for performing all the arithmetic and logical operations. The ALU receives the inputs from the accumulator and temporary registers and also stores result into accumulator. The ALU also accesses the flag register so as to line or reset the individual flags consistent with the result it's computed.

7.     Instruction Register and Decoder :

During the opcode fetch cycle, the 8-bit opcode of an instruction is transferred into the instruction register. The contents of the instruction register is received by instruction decoder and it's decoded to seek out the meaning of the instruction. After decoding the instruction, decoder directs the timing and control section to perform sequence of events so as to finish the execution of the present instruction.

8.     Interrupt section :

There are five instruction in 8085 : TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR. The TRAP is non-maskable while others are maskable. When interrupt comes on one among the pin, 8085 suspends current activity, saves the status and jumps to specific address where ISR is written. The jump addresses for every sort of interrupt and their priorities are listed in table.

The INTR is general purpose interrupt and external interrupt controller 8259 will provide the address of the utility routine .

9.     Serial Control Section :

The serial control section in 8085 provides the serial interface through SID (Serial Input Data) and SOD (Serial Output Data) lines. this type of direct serial interface avoids the necessity of external hardware in smaller system.

10.                        Timing and Control Section :

Once the instruction decoder decodes the instruction, it sends necessary signals to timing and control section to perform necessary steps so as to finish the execution of the instruction. These steps might include

the varied internal operations like moving contents of 1 register to other register or external operations like memory read, memory write, I/O read, and I/O write. The timing and control section is fully liable for controlling all the operations performed by the microprocessor. aside from controlling the varied operations, this section also provides necessary synchronization signals to perform various external operations with memory or I/O devices.